有没有人成功在华为海思平台上编译过内核模块

查了下4.4.197，/arch/arm/kernel/module.lds

SECTIONS {
        .core.plt : { BYTE(0) }
        .init.plt : { BYTE(0) }
}

section 里没有 .plt, 应该是 把 plt 拆分成 core.plt 和 init.plt。 同时，搜到这个patch，但似乎是更老的内核，没看懂

查了下4.4.197，/arch/arm/kernel/module.lds

SECTIONS {
        .core.plt : { BYTE(0) }
        .init.plt : { BYTE(0) }
}

section 里没有 .plt, 应该是 把 plt 拆分成 core.plt 和 init.plt。 同时，搜到这个patch，但似乎是更老的内核，没看懂

同时，我也查了下，4.x 系列的内核，到 4.9.30， 才改成

SECTIONS {
	.plt : { BYTE(0) }
	.init.plt : { BYTE(0) }
}

4.9-4.9.29 是

SECTIONS {
	.plt : { BYTE(0) }
}

感觉有点乱，不知道如何打补丁

根据这个patch, 如果直接将4.4.197下面几个文件替换成4.9.30的

/arch/arm/include/asm/module.h 
/arch/arm/kernel/module-plts.c
/arch/arm/kernel/module.lds

这个思路是否可行？ 或者有其他更好的给内核某个功能打补丁的方法？

综合4.x各版本PLTs演变情况，猜测，海思攻城狮应该基于4.9.30以上关于PLTs部分代码修改情况，对4.4.197 的PLTs做了部分修改，（这个人应该很熟悉内核代码，极有可能参与过内核patch研究和提交）。 4.9.30 PLTs的Changelog

    Since commit 35fa91eed817 ("ARM: kernel: merge core and init PLTs"),
    the ARM module PLT code allocates all PLT entries in a single core
    section, since the overhead of having a separate init PLT section is
    not justified by the small number of PLT entries usually required for
    init code.
    
    However, the core and init module regions are allocated independently,
    and there is a corner case where the core region may be allocated from
    the VMALLOC region if the dedicated module region is exhausted, but the
    init region, being much smaller, can still be allocated from the module
    region. This puts the PLT entries out of reach of the relocated branch
    instructions, defeating the whole purpose of PLTs.
    
    So split the core and init PLT regions, and name the latter ".init.plt"
    so it gets allocated along with (and sufficiently close to) the .init
    sections that it serves. Also, given that init PLT entries may need to
    be emitted for branches that target the core module, modify the logic
    that disregards defined symbols to only disregard symbols that are
    defined in the same section.